Everest CORE - Product Manual |
Application Guide
INGENIA | 08/01/2019
28
A couple o valid DC/DC examples:
Image
Part
Number
Manufac
turer
Typ
e
Description
RSD-30H
-5
Mean
Well
Exte
rnal
40 V to 160 V input, single 5 V
output, 30 W, 4 kV isolation
DC/DC
SPBW06
G-05
Mean
Well
PCB 18 V to 75 V input, single 5 V
output, 6 W, 1.5 kW isolation
DC/DC
Schematic
First, the proposed input stage has a TVS for ESD protection and an input filter. CLC might be good, but here ferrites
are used instead instead of inductors for space saving and to focus the attenuation in the highest frequencies.
5 V logic supply DC/DC requirements
•
Input voltage:
set by application (100 V will cover any possible scenario)
•
Output voltage:
+5 V
•
Output regulation:
±2% or less
•
Max. ripple:
200 mVp-p or less
•
Output current:
300 mA continuous, 500 mA continuous preferred.
•
Isolation voltage:
>1.5 kV recommended, although not mandatory in some cases.
Ingenia is committed to a more efficient use of energy and recommends to always select the
highest
efficiency
components.
Output current required
The minimum output current specified above is
only for Everest CORE
, so does not include the Interface
Board self-consumption or its capability to deliver current to other external circuits.
