Everest CORE - Product Manual |
Pinout
INGENIA | 08/01/2019
15
27
CLL
Reserved. Must be tied or
pulled-down to GND_D.
28
DIG_E
NC_1Z
Digital encoder 1 Index.
29
CHL
Reserved. Must be tied or
pulled-up to 3.3 V.
30
DIG_E
NC_2A
Digital encoder 2 A.
31
DNC
Reserved. Do not connect
(leave floating).
32
DIG_E
NC_2B
Digital encoder 2 B.
33
DNC
34
DIG_E
NC_2Z
Digital encoder 2 Index.
35
DNC
36
GND_D
Digital signal Ground.
Power
37
DNC
38
ABSEN
C1_CL
K
Clock output for Absolute
Encoder 1
.
Output
39
DNC
40
ABSEN
C1_DA
TA
Data input for Absolute
Encoder 1 (supports SSI or up
to 2 BiSS-C encoders
connected in daisy chain
topology).
Input
41
DNC
42
DNC
Reserved. Do not connect
(leave floating).
-
43
DNC
44
GND_D
Digital signal Ground.
Power
45
DNC
46
DNC
Reserved. Do not connect
(leave floating).
-
47
DNC
48
DNC
49
DNC
50
DNC
51
DNC
52
DNC
53
DNC
54
DNC
55
DNC
56
DNC
57
DNC
58
DNC
59
GND_D
Digital signal Ground.
Power
60
GND_D
Digital signal Ground.
Power
Notes and naming conventions:
•
All pins are tolerant to 3.3 V unless otherwise noted.
•
"_P" and "_N" indicates positive and negative of differential signals
•
"\" Indicates inverted (active low) signal
