Everest CORE - Product Manual |
Application Guide
INGENIA | 08/01/2019
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high-energy peak. To this purpose, varistors are more suitable. As a useful tip, in case a discrete line filter is
implemented, it is recommended to place the TVS after the common mode choke: as a CMC acts like an impedance
barrier (from the signals propagation point of view) perturbations in the internal DC bus could become fast and
short overvoltages when reflected in the CMC. If any of this reflections could reach a dangerous level, the TVS would
get rid of it.
With all this, the following generic solution is proposed:
Schematic
Ceramic and (optional) electrolytic capacitors:
Sourge and ESD protection:
Signals description
Signal
Description
POW_SUP_IN
+
Positive terminal of the power supply input
POW_SUP_IN- Negative or reference voltage terminal of the power supply input
POW_SUP
Internal DC bus positive supply. Could be connected to Everest CORE power pin 1 of P1 if no
Inverted Polarity protection is implemented
PE
Protective Earth. To be connected to chassis of Everest CORE. Could be left unconnected in
specific cases
