IDT 89HPES16T4AG2, User Manual

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IDT SMBus Interfaces
PES16T4AG2 User Manual 5 - 9 May 23, 2013
Notes Regardless of the state of the interrupt output of the I/O expander, the PES16T4AG2 will not issue a
master SMBus transaction to read the updated state of the I/O expander inputs more frequently than once
every 40 milliseconds (i.e., the I/O expander update period). This delay in sampling may be used to elimi-
nate external debounce circuitry. The I/O expander interrupt request output is negated whenever the input
values are read or when the input pin changes state back to the value previously read.
The PES16T4AG2 ensures that I/O expander transactions are initiated on the master SMBus in a fair
manner. This guarantees that all I/O expanders have equal service latencies. Any errors detected during I/
O expander SMBus read or write transactions is reflected in the status bits of the SMBus Status
(SMBUSSTS) register.
The I/O Expander Interface (IOEXPINTF) register allows direct testing and debugging of the I/O
expander functionality. The Select (SEL) field in the IOEXPINTF register selects the I/O expander number
on which other fields in the register operate. The I/O Expander Data field in the IOEXPINTF register reflect
the current state, as viewed by the PES16T4AG2, of the I/O expander inputs and outputs selected by the
SEL field.
Writing a one to the Reload I/O Expander Signals (RELOADIOEX) bit in the IOEXPINTF register causes
the PES16T4AG2 to generate SMBus write and read transactions to the I/O expander number selected in
the SEL field. This results in the value of the IOEDATA field being updated to reflect the current state of the
corresponding I/O expander signals. This feature may be used to aid in debugging I/O expander operation.
For example, a user who neglects to configure a GPIO as an alternate function may use this feature to
determine that master SMBus transactions to the I/O expander function properly and that the issue is with
the interrupt logic.
The IO Expander Test Mode (IOEXTM) bit in the IOEXPTINF register allows an I/O expander test mode
to be entered. When this bit is set, the PES16T4AG2 core logic outputs are ignored and the values written
to the I/O expander for output bits are the values in the IOEDATA field. In this mode, the PES16T4AG2
issues a transaction to update the state of the I/O expander whenever a bit corresponding to an I/O
expander output changes state due to a write to the IOEDATA field.
Bits in the IOEDATA field that correspond to outputs are dependent on the I/O expander number
selected in the SEL field in the IOEXPINTF register. The outputs for each I/O expander number are shown
in Table 5.5 through 5.9.
IDT suggests the following system design recommendations:
– I/O expander addresses and default output values may be configured during serial EEPROM
initialization. If I/O expander addresses are configured via the serial EEPROM, then the
PES16T4AG2 will initialize the I/O expanders when normal device operation begins following the
completion of the fundamental reset sequence.
– If the I/O expanders are initialized via serial EEPROM, the data value for output signals during the
SMBus initialization sequence will correspond to those at the time the SMBus transactions are
initiated. It is not possible to toggle SMBus I/O expander outputs by modifying data values during
serial EEPROM initialization.
– During a fundamental reset and before the I/O expander outputs are initialized, all I/O expander
output signals default to inputs. Therefore, pull-up or pull-down resistors should be placed on
outputs to ensure that they are held in the desired state during this period.
– All hot-plug data value modifications that correspond to hot-plug outputs result in SMBus transac-
tions. This includes modifications due to upstream secondary bus resets and hot-resets.
– I/O expander outputs are not modified when the device transitions from normal operation to a
fundamental reset. In systems where I/O expander output values must be reset during a funda-
mental reset, a PCA9539 I/O expander should be used.