IDT 89HPES16T4AG2, User Manual

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IDT Configuration Registers
PES16T4AG2 User Manual 8 - 15 May 23, 2013
Notes IOBASE - I/O Base Register (0x01C)
IOLIMIT - I/O Limit Register (0x01D)
SECSTS - Secondary Status Register (0x01E)
Bit
Field
Field
Name
Type
Default
Value
Description
0 IOCAP RWL 0x1 I/O Capability. Indicates if the bridge supports 16-bit or 32-bit I/O
addressing.
0x0 - (io16) 16-bit I/O addressing.
0x1 - (io32) 32-bit I/O addressing.
3:1 Reserved RO 0x0 Reserved field.
7:4 IOBASE RW 0xF I/O Base. The IOBASE and IOLIMIT registers are used to control
the forwarding of I/O transactions between the primary and sec-
ondary interfaces of the bridge. This field contains A[15:12] of the
lowest I/O address aligned on a 4KB boundary that is below the
primary interface of the bridge.
Bit
Field
Field
Name
Type
Default
Value
Description
0 IOCAP RO 0x1 I/O Capability. Indicates if the bridge supports 16-bit or 32-bit I/O
addressing. This bit always reflects the value of the IOCAP field
in the IOBASE register.
3:1 Reserved RO 0x0 Reserved field.
7:4 IOLIMIT RW 0x0 I/O Limit. The IOBASE and IOLIMIT registers are used to control
the forwarding of I/O transactions between the primary and sec-
ondary interfaces of the bridge. This field contains A[15:12] of the
highest I/O address, with A[11:0] assumed to be 0xFFF, that is
below the primary interface of the bridge.
Bit
Field
Field
Name
Type
Default
Value
Description
7:0 Reserved RO 0x0 Reserved field.
8 MDPED RO 0x0 Master Data Parity Error. Not applicable.
10:9 DVSEL RO 0x0 Not applicable.
11 STAS RO 0x0 Signalled Target Abort Status. Not applicable.
12 RTAS RO 0x0 Received Target Abort Status. Not applicable.
13 RMAS RO 0x0 Received Master Abort Status. Not applicable.
14 RSE RW1C 0x0 Received System Error. This bit is controlled by the SERR
enable bit in the Bridge Control (BCTL) register. If the SERRE bit
is cleared in BCTL, then this bit is never set. Otherwise, this bit is
set if the secondary side of the bridge receives an ERR_FATAL
or ERR_NONFATAL message.