IDT 89HPES16T4AG2, User Manual

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IDT PES16T4AG2 Device Overview
PES16T4AG2 User Manual 1 - 9 May 23, 2013
Notes
Pin Characteristics
Note: Some input pads of the PES16T4AG2 do not contain internal pull-ups or pull-downs.
Unused inputs should be tied off to appropriate levels. This is especially critical for unused control
signal inputs which, if left floating, could adversely affect operation. Also, any input pin left floating
can cause a slight increase in power consumption.
Function Pin Name Type Buffer
I/O
Type
Internal
Resistor
1
Notes
PCI Express
Interface PE0RN[3:0] I PCIe
differential
2
Serial Link
PE0RP[3:0] I
PE0TN[3:0] O
PE0TP[3:0] O
PE1RN[3:0] I
PE1RP[3:0] I
PE1TN[3:0] O
PE1TP[3:0] O
PE2RN[3:0] I
PE2RP[3:0] I
PE2TN[3:0] O
PE2TP[3:0] O
PE3RN[3:0] I
PE3RP[3:0] I
PE3TN[3:0] O
PE3TP[3:0] O
PEREFCLKN I HCSL Diff. Clock
Input
Refer to Table 8
in the
PES16T4AG2
Data Sheet
PEREFCLKP I
SMBus
MSMBCLK I/O STI
3
pull-up on board
MSMBDAT I/O STI pull-up on board
SSMBCLK I/O STI pull-up on board
SSMBDAT I/O STI pull-up on board
General Pur-
pose I/O GPIO[10:7, 2:0] I/O LVTTL STI,
High Drive
pull-up
System Pins CCLKDS I LVTTL Input pull-up
CCLKUS I Input pull-up
P01MERGEN I pull-up
P23MERGEN I pull-up
PERSTN I STI
SWMODE[2:0] I Input pull-down
Table 1.9 Pin Characteristics (Part 1 of 2)