IDT 89HPES16T4AG2, User Manual, Page: 10 / 165

IDT Table of Contents
PES16T4AG2 User Manual ii May 23, 2013
Notes Autonomous Link Reliability Management ............................................................................. 3-6
Link Retraining................................................................................................................................ 3-7
Link Down ....................................................................................................................................... 3-8
Slot Power Limit Support ................................................................................................................ 3-8
Upstream Port ........................................................................................................................ 3-8
Downstream Port.................................................................................................................... 3-8
Link States ...................................................................................................................................... 3-8
Active State Power Management ................................................................................................... 3-9
Link Status .................................................................................................................................... 3-10
De-emphasis Negotiation ............................................................................................................. 3-10
Low-Swing Transmitter Voltage Mode.......................................................................................... 3-10
Crosslink ....................................................................................................................................... 3-10
General Purpose I/O
Introduction ..................................................................................................................................... 4-1
GPIO Configuration ........................................................................................................................ 4-1
GPIO Pin Configured as an Input ........................................................................................... 4-1
GPIO Pin Configured as an Output ........................................................................................ 4-2
GPIO Pin Configured as an Alternate Function...................................................................... 4-2
SMBus Interfaces
Introduction ..................................................................................................................................... 5-1
Master SMBus Interface ................................................................................................................. 5-2
Initialization............................................................................................................................. 5-2
Serial EEPROM...................................................................................................................... 5-2
I/O Expanders......................................................................................................................... 5-6
Slave SMBus Interface ................................................................................................................. 5-13
Initialization........................................................................................................................... 5-14
SMBus Transactions ............................................................................................................ 5-14
Power Management
Introduction ..................................................................................................................................... 6-1
PME Messages............................................................................................................................... 6-2
PCI-Express Power Management Fence Protocol ......................................................................... 6-2
Power Budgeting Capability............................................................................................................ 6-3
Hot-Plug and Hot-Swap
Hot-Plug.......................................................................................................................................... 7-1
Hot-Plug I/O Expander ........................................................................................................... 7-4
Hot-Plug Interrupts and Wake-up ........................................................................................... 7-4
Legacy System Hot-Plug Support .......................................................................................... 7-5
Hot-Swap ........................................................................................................................................ 7-6
Configuration Registers
Configuration Space Organization.................................................................................................. 8-1
Upstream Port (Port 0) ........................................................................................................... 8-2
Downstream Ports .................................................................................................................. 8-6
Register Definitions....................................................................................................................... 8-10
Type 1 Configuration Header Registers ............................................................................... 8-10
PCI Express Capability Structure ......................................................................................... 8-20
Power Management Capability Structure ............................................................................. 8-36
Message Signaled Interrupt Capability Structure ................................................................. 8-37