35
PW3335A985-01
(4)
Status and Event Control Commands
Clear Event Register, Status Byte Register (Except Output Queue)
Syntax
Command
*CLS
Description
Clears the event status registers. The Status Byte Register bits corresponding to the
event status registers are also cleared. (
SESR, ESR0, ESR1, RS232c:ERRor
)
Note
・
The output queue, enable registers, and bit 4 of the status byte register (MAV) are not
affected.
・
This command can be executed even when a system error has occurred.
Read/Write the Standard Event Status Enable Register (SESER)
Syntax
Command
*ESE
<0
～
255(NR1)>
Query
*ESE?
Response
<0
～
255(NR1)>
Description
Command
The SESER mask is set to the numerical value 0 to 255.
The initial value (at power-on) is 0.
Although NRf numerical values are accepted, values to the right of the
decimal are truncated.
URQ (bit 6) and RQC (bit 1) is not used by the instrument. Therefore, these
events will not be triggered even if a value of 1 is specified.
Query
The contents of the SESER, as set by the
*ESE
command, are returned as
an NR1 value (0 to 255).
128
64
32
16
8
4
2
1
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
PON
URQ
CME
EXE
DDE
QYE
RQC
OPC
Example
Command
*ESE 36
(Sets bits 5 and 2 of SESER)
Query
*ESE?
Response
(When HEADER ON)
*ESE 36
(When HEADER OFF)
36
Read and Clear Standard Event Status Register (SESR)
Syntax
Query
*ESR?
Response
<0
～
255 (NR1)>
Description
Returns the contents of the SESR as an NR1 value from 0 to 255, then clears register
contents.
The response message has no header.
128
64
32
16
8
4
2
1
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PON
URQ
CME
EXE
DDE
QYE
RQC
OPC
Example
*ESR?
32
Bit 5 of the SESR has been set to 1.
→A CME (Command Error) has occurred.
Note
・
This command can be executed even when a system error has occurred.
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