8
PW3335A985-01
Event Registers
Standard Event Status Register (SESR)
The Standard Event Status Register is an 8-bit register.
If any bit in the Standard Event Status Register is set to 1(after masking by the Standard Event Status Enable
Register), bit 5 (ESB) of the Status Byte Register is set to 1.
See:
“Standard Event Status Enable Register (SESER)” (p. 9)
The Standard Event Status Register is cleared in the following situations:
• When a
*CLS
command is executed
• When an event register query (
*ESR?
) is executed
• When the instrument is powered on
Bit 7
PON
Power-On Flag
Set to 1 when the power is turned on, or upon recovery from an outage.
Bit 6
URQ
User Request
unused
Bit 5
CME
Command error (The command to the message terminator is ignored.)
This bit is set to 1 when a received command contains a syntactic or semantic
error:
•
Program header error
•
Incorrect number of data parameters
•
Invalid parameter format
•
Received a command not supported by the instrument
Bit 4
EXE
Execution Error
This bit is set to 1 when a received command cannot be executed for some
reason.
•
The specified data value is outside of the set range
•
The specified data cannot be set (data format discrepancy)
•
Execution is prevented by some other operation being performed
Bit 3
DDE
Device-dependent Error
This bit is set to 1 when a command cannot be executed due to some reason
other than a command error, a query error or an execution error.
•
An internal error occurred and execution cannot be performed (error
displayed)
•
A command was received that cannot be executed during a restricted
operation (integration, hold, etc.)
•
When "o.r",
”S.Err” or ”-----“ occurs and the error data is read by a
query.
Bit 2
QYE
Query Error (the output queue is cleared)
This bit is set to 1 when a query error is detected by the output queue control.
•
When an attempt is made to read the output queue when the output queue is
empty (GP-IB only)
•
When the data overflows the output queue
•
When the next command is received while there is data in the output queue
•
Bit 1
RQC
(unused)
Request Control
Bit 0
OPC
Operation Complete
This bit is set to 1 in response to an
•
It indicates the completion of operations of all messages up to the
*OPC
command
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