Freescale Semiconductor Microcontrollers, Manual

Page: 721 / 892

Debugging Memory Map
The DMM GUI
721 Microcontrollers Debugger Manual
CPU Core Types and Priorities
This section details the available cores and their respective types and priorities.
HCS08 CPU
The following types and priorities are available for the HCS08 CPU.
Priorities:
• highest (debugger) : a high debugger priority that can be used by the user or defined
for the debugger, typically to protect a memory area from being read.
• default (device) : default CPU visibility of the entire device/memory with the same
priority, so no memory range can be moved to overlap another memory range.
• lowest (debugger) : a low debugger priority that can be used by the user or defined
for the debugger typically to protect a memory area from being read. This priority is
of poor usage but can still be used for display purposes on chip unimplemented
memory range.
Types:
• LAP Registers : This mode is only available for HCS08 devices with an on-chip
MMU. This sets the memory range as special on-chip LAP registers. Typically, a
specific range is already preset with this type so you do not need to use this type.
• linear : This mode is only available for HCS08 devices with an on-chip MMU. This
sets the memory as linear address space (also called Extended Address ); range
typically addressed by the on-chip linear address pointer.
• physical : this sets the memory range as physical, i.e. with local 16-bit address bus
access as performed by the CPU when reading and writing the on-chip memory .
• banked : This mode is only available for HCS08 devices with an on-chip MMU. This
sets the memory as banked (i.e., accessed in the PPAGE window ($8000-$BFFF)
with PPAGE register handling). The banked type provides the debugger logical
display of the memory. A range defined as banked is displayed in the Memory
window with a physical/local address in addition to PPAGE << 16. This logical
address is therefore only valid in the $8000-$BFFF window. For example, an
instruction address at $8050 in PPAGE $03 is visible in the Memory window at
$038050.
• EEPROM banked : This mode is only available for HCS08 devices with an on-chip
EEPROM module having several pages. A range defined as EEPROM banked is
displayed in the Memory window with a physical/local address in addition to the
bit(s) to switch EEPROM pages << 16 . This logical address is therefore only valid
in the EEPROM range window.