SCPI and IEEE Bus Descriptions
Status Reporting System
4B
4B-15
bit 15
Operation
Status
Register
FIFO
Output
Queue
Operation Status
Enable Register
Summary Bit -- OSS
SCPI Status Structure Registers
IEEE 488.2 Status Structure Registers
OPERation:
EVENt ?
Sweeping
Waiting for
Trig
Ext AM or FM
Overload
Head SN Mismatch
Ext Ref Freq
Unlocked
Frequency
Voltage
OPERation:
ENABle Nrf
Master Status Summary Bit
Request for Service Bit
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
OPERation:
ENABle ?
bit 15
Questionable
Status
Register
Questionable
Status
Enable Register
Summary Bit - QSS
QUEStionable:
EVENt ?
QUEStionable:
ENABle Nrf
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
QUEStionable:
ENABle ?
Summary Bit -- ESB
Status
Byte
Register
Service Request
Enable Register
*STB?
Message Available Bit - MAV
(True if one or more messages
are present in the Output Queue)
bit 0
bit 1
bit 2
bit 3
QSS
bit 4
MAV
bit 5
ESB
bit 7
OSS
*SRE?
MSS
RQS
bit 6
Standard-Defined
Event Status
Register
Event Status
Enable Register
*ESR?
*ESE Nrf
*SRE Nrf
bit 0
OPC
bit 1
RQC
bit 2
QYE
bit 3
DDE
bit 4
EXE
bit 5
CME
bit 7
PON
bit 6
URQ
*ESE?
Power On
Command Error
Execution Error
Device-Dependent
Error
Query Error
Operation
Complete
*
= Not used
*
= Not used
*
= Not used
*
= Not used
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
ead111f.eps
Figure 4B-12. Instrument Status Register Structure
Summary of Contents for 9640A Series
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