AT90S/LS2333 and AT90S/LS4433
30
Timer Counter 0 - TCNT0
The Timer/Counter0 is realized as an up-counter with read and write access. If the Timer/Counter0 is written and a clock
source is present, the Timer/Counter0 continues counting in the clock cycle following the write operation.
16-bit Timer/Counter1
Figure 32 shows the block diagram for Timer/Counter1.
Figure 32. Timer/Counter1 Block Diagram
The 16-bit Timer/Counter1 can select clock source from CK, prescaled CK, or an external pin. In addition it can be stopped
as described in the specification for the Timer/Counter1 Control Register - TCCR1A. The different status flags (overflow,
compare match and capture event) and control signals are found in the Timer/Counter Interrupt Flag Register - TIFR. The
interrupt enable/disable settings for Timer/Counter1 are found in the Timer/Counter Interrupt Mask Register - TIMSK.
Bit
7
6
5
4
3
2
1
0
$32 ($52)
MSB
LSB
TCNT0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
T1
