ARM DDI 0306B
Copyright © 2003, 2004. ARM Limited. All rights reserved.
vii
List of Figures
PrimeCell Inter-Processor Communications
Module (PL320) Technical Reference Manual
Key to timing diagram conventions ............................................................................. xii
Figure 2-1
IPCM block diagram .................................................................................................. 2-2
Figure 2-2
IPCM integration in a multiprocessing system .......................................................... 2-3
Figure 2-3
Basic operation ......................................................................................................... 2-5
Figure 2-4
Mailbox interrupt mapping to IPCM interrupt outputs .............................................. 2-11
Figure 2-5
Configuration, messaging from Core0 to Core1 ...................................................... 2-18
Figure 2-6
Messaging from Core0 to Core1 ............................................................................. 2-19
Figure 2-7
Configuration, back-to-back messaging from Core0 to Core1 ................................ 2-20
Figure 2-8
Back-to-back messaging from Core0 to Core1 ....................................................... 2-21
Figure 2-9
Configuration, messaging from Core0 to Cores 1, 2, and 3 using Auto Acknowledge ....
2-22
Figure 2-10
Messaging from Core0 to Cores 1, 2, and 3 using Auto Acknowledge ................... 2-23
Figure 2-11
Configuration, Auto Link messaging from Core0 to Core1 using Mailbox0 and Mailbox1
2-25
Figure 2-12
Auto Link messaging from Core0 to Core1 using Mailbox0 and Mailbox1 .............. 2-25
Figure 3-1
IPCM register map .................................................................................................... 3-4
Figure 3-2
Mailbox0 register map ............................................................................................... 3-5
Figure 3-3
Interrupt0 register map .............................................................................................. 3-5
Figure 3-4
IPCMxMODE Register bit assignments .................................................................. 3-14
Figure 3-5
IPCMxSEND Register bit assignments ................................................................... 3-16
Figure 3-6
Mailbox status ......................................................................................................... 3-18
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
