Preface
xii
Copyright © 2003, 2004. ARM Limited. All rights reserved.
ARM DDI 0306B
Shaded bus and signal areas are undefined, so the bus or signal can assume any value
within the shaded area at that time. The actual level is unimportant and does not affect
normal operation.
Key to timing diagram conventions
Signals
The signal conventions are:
Signal level
The level of an asserted signal depends on whether the signal is
active-HIGH or active-LOW. Asserted means HIGH for
active-HIGH signals and LOW for active-LOW signals.
Prefix A
Denotes
Advanced eXtensible Interface
(AXI) global and address
channel signals.
Prefix B
Denotes AXI write response channel signals.
Prefix C
Denotes AXI low-power interface signals.
Prefix H
Denotes
Advanced High-performance Bus
(AHB) signals.
Prefix n
Denotes active-LOW signals except in the case of AXI, AHB or
Advanced Peripheral Bus
(APB) reset signals.
Prefix P
Denotes APB signals.
Prefix R
Denotes AXI read channel signals.
Prefix W
Denotes AXI write channel signals.
Suffix n
Denotes AXI, AHB, and APB reset signals.
Clock
HIGH to LOW
Transient
HIGH/LOW to HIGH
Bus stable
Bus to high impedance
Bus change
High impedance to stable bus
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