Alstom SHPM 101, Service Manual

Page: 100 / 336

SERVICE MANUAL R5888C
QUADRAMHO Chapter 2
Page 38 of 74
sinewave peak voltage. The zero crossings of the resultant signal remain in phase
with those of the cross polarising signal, that is, no displacement from the prefault
position.
Figure 43 shows conditions similar to Figure 42, but with the faulted phase voltage
displaced by 60
°
. Under these conditions the resultant polarising signal is
displaced by about 20
°
from its prefault position, because the faulted phase
displacement exceeds the captive angle by this amount.
When the displacement of the faulted phase voltage is just equal to the captive
angle Ø
°
;
V
pk
sin Ø
°
= V
POL
Captive angle Ø
°
. = sin
–1
V
POL
V
pk
provided that V
pk
≥
V
POL
If V
pk
< V
POL
, the sinewave has no effect on the polarising signal, so the
characteristic becomes fully cross polarised.
Since the displacement of the resultant polarising signal is zero if the faulted phase
voltage is less than the captive angle, the boundary of the characteristic over this
range is the same as that of a fully cross polarised mho (See Figure 41).
For high values of displacement of the faulty phase, the curves of the resultant
polarising signal for a conventional partially cross polarised mho and for
Quadramho are asymptotic. This means the reach of Quadramho in the capacitive
reactance region is the same as for a relay with 16% sinewave cross polarising
(See Figure 41).
Although Figure 41 is drawn for a constant fault voltage, the principles remain the
same for constant SIR conditions. The higher the SIR the lower the fault voltage and
the larger the capture angle. Hence the relay becomes progressively more cross
polarised as the SIR rises, as previously shown in Figure 37.
A simple graphical method showing how to determine the practical polar plots
may be found in the application notes.
5.2.2 Synchronous polarising
The synchronous polarising signal is available for 8 cycles following a 3 phase
close-up fault. This time is sufficient to keep the Zone 1 comparators in a stable
condition for a reverse fault, until it is cleared by other protection. In the case of a
forward fault, 8 cycles is more than sufficient to allow Quadramho to trip and clear
the fault.
Under three phase close up fault conditions, the polarising signal is controlled by
the synchronous polarising signal V
MA
(See Figure 39). After 8 cycles this power
system frequency signal is replaced by 0.3% of –
I
A
Z
Ph
. This limits the directional
sensitivity of the comparator once the synchronous polarising has reduced to
approximately 1.3% of rated voltage, for 3 phase faults.
The synchronous polarising system is implemented as a software control feature of
the microprocessor in the scheme logic module (see Section 4.9.23) and the basis
of the system is a set of 32 registers of 8 bits each, which may be imagined as
being arranged in a carousel as shown in Figure 44. The carousel may be
regarded as rotating anti-clockwise under healthy live conditions on the
transmission line.