Agilent Technologies E4428C, User Manual

Page: 579 / 700

Chapter 16 555
W-CDMA Uplink Digital Modulation for Receiver Test
W-CDMA Uplink Concepts
PATTERN
TRIGGER IN 2 AUX I/O Pin 17 Input Compressed mode stop trigger. Compressed
mode must be active. The trigger instructs the
signal generator to stop the compressed mode
pattern at the frame number specified in the
Stop CFN#
data field.
ALT POWER IN AUX I/O Pin 16 Input Trigger for user-defined TPC bits.
BURST GATE IN BNC Input Compressed mode start trigger or the TPC
control signal.
The compressed mode or TPC mode must be
active. The compressed mode start trigger
instructs the signal generator to begin the
compressed mode pattern. The TPC control
signal instructs the ESG to increase or decrease
the DPCH signal power relative to the carrier
power.
BASEBAND
GEN REF IN BNC Input External system clock in. This connector is used
for chip clock input when using external data
clock sources. To use an external signal source as
the data clock input, press
BBG Chip Clock Ext Int
to Ext or send the appropriate SCPI command.
This clock rate can be multiplied by setting the
Ext Clock Rate X1 X2 X4
softkey to either x2 or x4.
10 MHz IN BNC Input 10 MHz reference in.
10 MHz OUT BNC Output 10 MHz reference out.
EVENT 1 BNC Output Signal assigned by user. Default is DPDCH raw
data.
EVENT 2 BNC Output Signal assigned by user. Default is DPDCH raw
data clock.
EVENT 3 AUX I/O Pin 19 Output Signal assigned by user. Default is none.
EVENT 4 AUX I/O Pin 18 Output Signal assigned by user. Default is none.
Table 16-5 Connector Descriptions for DPCH Mode (Continued)
Connector Label Connector Type Input/Ou
tput
Assigned Signal