ADCMT 6247C, Operation Manual

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6247G/6247C DC Voltage Current Source/Monitor Operation Manual
5.2.14 Self Test
5-68
20 201
VSVM 5 V ZERO VSVM 5V Zero
c
1
21 202
VSVM 5 V +FS VSVM 5V +FS
2
22 203
VSVM 5 V -FS VSVM 5V -FS
4
23 204
VSVM 50 V ZERO VSVM 50V Z
8
24 205
VSVM 50 V +FS VSVM 50V +FS
16
25 206
VSVM 50 V -FS VSVM 50V -FS
32
26 207
VSVM 250 V ZERO VSVM 250V Z
64
27 208
VSVM 250 V +FS VSVM 250V +F
128
28 209
VSVM 250 V -FS VSVM 250V -F
256
29 211
High Limit + 5 V FS HL +5V FS
512
30 212
High Limit -1 V FS HL -1V FS
1024
31 213
High Limit + 50 V FS HL +50V FS
2048
32 214
High Limit -10 V FS HL -10V FS
4096
33 215
High Limit + 250 V FS HL +250V FS
8192
34 216
High Limit -15 V FS HL -15V FS
16384
35 221
Low Limit + 5 V FS LL +5V FS
b
256
36 222
Low Limit -1 V FS LL -1V FS
512
37 223
Low Limit + 50 V FS LL +50V FS
1024
38 224
Low Limit -10 V FS LL -10V FS
2048
39 225
Low Limit + 250 V FS LL +250V FS
4096
40 226
Low Limit -15 V FS LL -15V FS
8192
41 230
IM 3

A ZERO IM 3uA Zero
d
1
42 231
IM 30

A ZERO IM 30uA Zero
2
43 232
IM 300

A ZERO IM 300uA Z
4
44 233
IM 3 mA ZERO IM 3mA Zero
8
45 234
IM 30 mA ZERO IM 30mA Zero
16
46 235
IM 300 mA ZERO IM 300mA Z
32
47 301
OVL detection check OVL Check
64
48 311
Sample hold check S/H Check
512
49 -
All the panels light ON (Visual check)
-
-
50 -
Buzzer (Buzzer sound check)
51 -
Panel key (Visual check)
(*1) TER? command response register and data
In the error register (ERR?) the following bits are set.
At power ON;
bit 0
In executing the self-test; bit 1
*As for the error codes, 501, 502, 503, 130 and 571, these error register bits are not set even if an error occurs at power ON.
Table 5-17 Self-Test Items (2 of 2)
Error code Description
Execution method
Message
TER register (*1)
Power
ON
*TST?
Key
operation
Register Data