3Com CoreBuilder 9000, User Manual

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Traffic Management in the CoreBuilder 9000 ATM Enterprise Switch 403
Setting Up Traffic
Management
Hardware
The ATM Layer Processor (ALP) of the ATM Interface Module and the ATM
Switch Fabric Module are responsible for traffic management.
ATM Layer Processor
The ATM Layer Processor handles the temporary storage of ATM cells in
the 8K-cell Cell RAMs. It has the following features:
Handles the cell queues in the three priority Cell RAM queues for each
subport, on Tx.
Handles the cell queues in the three priority Cell RAM queues for each
switch fabric module port, on Rx.
Handles EPD, PPD, and CLP traffic management
Handles EFCI marking
Control Flow for Setting Up Traffic Management
Figure 26 shows the control flow that occurs when you set up Traffic
Management in the CoreBuilder 9000 ATM Enterprise Switch. The Traffic
Management process for a call begins when a call connection is initiated.
The CPU of the ATM Switch Fabric Module transmits control frames (1) to
the CPU in the ATM Interface Module (2) instructing it which traffic
control mechanisms to use for that call. These mechanisms can include
Queue Priority and Back Pressure, EPD, PPD and CLP-based Cell Discard;
the specific mechanisms activated depend on the Traffic Contract and
QoS requirements that are associated with the specific connection. The
CPU sets up the ATM Layer Processor (3) to execute the selected traffic
management mechanisms for the particular call.