MAX 10 NEEK
55
www.terasic.com
February 4, 2016
The SW[2:0] can choose which bus to be displayed on the two 7-segments according to the
Table 5-2
.
Table 5-2
Switch setting for power
SUB POWER
SW[2:0]
1.2VCC
000
1.5VCCIO 001
2.5VCCIO 010
2.5VCORE 011
3.3VCCIO 100
5.0VCC 101
5
5
.
.
3
3
A
A
D
D
C
C
P
P
o
o
t
t
e
e
n
n
t
t
i
i
o
o
m
m
e
e
t
t
e
e
r
r
Nowadays voltage and current monitors play a significant role in high-reliability system. Most of
applications can be implemented by an Analog-to-Digital Converter (ADC). MAX10 NEEK
provides a potentiometer demonstration using the ADC in MAX10. This ADC solution consists of
hard IP blocks in MAX 10 device and soft logic through Altera Modular ADC IP core.
Figure 5-4
shows the block diagram of ADC hard IP block in MAX10 device.
Figure 5-4 Block diagram of ADC hard IP block
This demo uses 2nd ADC of MAX10 on channel 8. The ADC settings are shown in
Figure 5-5
.
