MAX 10 NEEK
33
www.terasic.com
February 4, 2016
MIPI_PIXEL_D[21] PIN_AB6
Parallel Port Data
3.3V
MIPI_PIXEL_D[22] PIN_AA6
Parallel Port Data
3.3V
MIPI_PIXEL_D[23] PIN_Y6
Parallel Port Data
3.3V
MIPI_RESET_n PIN_AA3 Master Reset signal for MIPI camera and bridge device 3.3V
MIPI_PIXEL_CLK PIN_V10
Parallel Port Clock signal
3.3V
MIPI_PIXEL_HS PIN_AA2 Parallel
Port
Horizontal Synchronization signal
3.3V
MIPI_PIXEL_VS PIN_AA1 Parallel
Port
Vertical Synchronization signal
3.3V
MIPI_CS_n PIN_U7
Chip
Select
3.3V
MIPI_REFCLK
PIN_W17
Reference Clock Input of bridge device
3.3V
MIPI_I2C_SCL
PIN_Y1
I2C Clock for bridge device
3.3V
MIPI_I2C_SDA
PIN_M2
I2C Data for bridge device
3.3V
CAMERA_PWDN_n PIN_R11
Power Down signal of MIPI camera
3.3V
CAMERA_I2C_SCL PIN_A20
I2C Clock for MIPI camera
2.5V
CAMERA_I2C_SDA PIN_B19
I2C Data for MIPI camera
2.5V
3
3
.
.
4
4
.
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1
1
2
2
7
7
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0
0
I
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c
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h
C
C
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l
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r
r
L
L
C
C
D
D
w
w
i
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t
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h
h
5
5
-
-
p
p
o
o
i
i
n
n
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C
C
a
a
p
p
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v
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-
-
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The MAX 10 NEEK provides a 7.0 inch color LCD module which is an all-purpose 5-point
capacitive touch-screen for FPGA applications.
Figure 3-25
shows the connection of 7.0 inch color
LCD and MAX 10 FPGA. The pin assignment associated to this 7.0 inch color LCD interface is
shown in
Table 3-12
.
Figure 3-25 Connections between 7.0 inch color LCD and MAX 10 FPGA
Table 3-13 Pin Assignment of 7.0 inch LCD interface
Signal Name
FPGA Pin No.
Description
I/O Standard
MTL2_R[0]
PIN_U5
Red Data (LSB)
3.3V
MTL2_R[1] PIN_U4
Red
Data
3.3V
