MAX 10 NEEK
25
www.terasic.com
February 4, 2016
support from -6.25V to +6.25V range.
Figure 3-19
shows the connection of SMA connectors to the
FPGA.
Figure 3-19 Connection of SMA connectors to the FPGA
3.4.7
D
D
D
D
R
R
3
3
M
M
e
e
m
m
o
o
r
r
y
y
The board supports 256MB of DDR3 SDRAM comprising of one 16 bit (64Mx16) DDR3 device and
one 8 bit (128Mx8) device. The DDR3 devices shipped with this board are running at 300MHz with
the soft IP of MAX 10 external memory interface solution.
Figure 3-20
shows the connections
between the DDR3 and MAX 10 FPGA.
Table 3-8
shows the DDR3 interface pin assignments.
