Teledyne Sierra M6-2, Руководство пользователя, Страница: 337 / 538

Sierra M6 ‐ 2 SAS/SATA Protocol Analyzer User Manual 335
Preferences Teledyne LeCroy
does not work for two ports connected to different FPGAs, for example ports 1
and 3.

Triggering : Memory Assignment only starts after the trigger point. During
pre ‐ trigger, each physical link is always assigned to a specific memory bank.
Post ‐ trigger, the system can try to use empty space in all memory banks, if you
check the MA option. Therefore, Memory Assignment efficiency is maximum
when Trigger Position is set to 0% (snap
‐ shot trigger) and is minimum when Trig ‐
ger Position is set to 99% or when there is no triggering (you stop recording man ‐
ually).

MUX : When MUX is enabled, each segment has four memory banks, limiting
Memory Assignment somewhat.
Here are examples of different Port Configurations and Trigger Positions:

One port configuration (A ‐ ‐ ‐ ): Sample size is user ‐ specified sample size.

Two port configuration (AA ‐ ‐ ) : Ports 1 and 2 are on the same FPGA, so
Memory Assignment has an effect. If you use snapshot triggering, the sample
size is near specified size.

Two port configuration (AA ‐ ‐ ): If you use manual stop, Memory Assignment has
no effect. Sample size depends on port traffic loads.

Two port configuration (AA ‐ ‐ ) : If trigger is set at 50%, and there is enough data
to fill pre ‐ trigger, Memory Assignment has an effect. Sample size is typically near
specified size.

Two port configuration (AA ‐ ‐ ) : If trigger is set at 50%, but there is not enough
data to fill pre ‐ trigger, Memory Assignment has an effect. Sample size is typically
more than half specified size, with size determined by the amount of data cap ‐
tured before trigger.

Two port configuration (A ‐ A ‐ ) : Ports 1 and 3 are not on the same FPGA, so
Memory Assignment has no effect. If one port has heavy traffic, it may fill its
memory bank and stop recording, resulting in smaller sample size than specified.
Note:
Checking this option does not affect the sample. It only allows larger sample sizes.
Note:
If traffic is balanced on ports, sample size is the same whether you check or uncheck the
Sampling Memory Usage Optimization option.
Note:
Memory Assignment depends on traffic load distribution at the time when the system tries to
re ‐ assign physical links to memory banks. Therefore, if you repeat a capture with the same
Sampling Memory Size and Segment Number parameters, the resulting sample size may not be
the same. However, if traffic load distribution is similar, sample size will be similar.
Note:
The buffer status indicator shows buffer by FPGA, not by port.
If the Sampling Memory Usage Optimization Option is Not Checked
Each physical link (or logical link if MUX is enabled) is assigned to a specific memory space
(memory bank), depending on the Sampling Memory Size and Segment Number
parameters.