Tektronix LTA7P Series, Руководство по обслуживанию

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Theory of Operation
TLA7Nx, TLA7Px, & TLA7Qx Logic Analyzer Module Service Manual
3- 3
Acquisition System.
Acquired data from the probe interface is sent to the data
recognition circuitry. The data recognition circuitry analyzes the acquired data
and determines which data to qualify and send to the acquisition memory. It also
sends trigger event signals to the trigger and storage circuitry.
Trigger and Storage Control Circuitry.
The trigger and storage control circuitry
works with the data recognition circuitry. The trigger circuitry determines when
to store data and when to trigger, controls counter/timers, and drives intermodule
signals. The storage circuitry receives information from the trigger circuitry to
determine when to start storing data and when to stop storing data.
Acquisition Memory.
The acquisition memory stores acquired data. The acquisi-
tion memory can be set up to contain all data samples or it can be split to contain
data samples and glitch information.
When the acquisition memory is split, half of the memory depth is lost and the
logic analyzer module can only run at half speed. Each stored data sample takes
up two memory locations: one to store the actual data sample, and the other to
store the corresponding glitch information.
Backplane Interface.
The backplane interface provides the interface with the
mainframe and the Acquisition board. The interface contains intermodule signals
that communicate with other modules. It also provides the 10 MHz reference
clock.
Local Processing Unit Interface.
The LPU interface provides the interface between
the LPU circuit board and the acquisition board through two 100-pin ribbon
cables (W100 and W200).
Each comparator daughter board passes 32 data signals and 2 clock/qualifier
signals from the probes through two probe receiver ICs to the Acquisition board.
Each prove receiver also receives two threshold voltages (four threshold signals
total) from the Acquisition board. This results in 72 signal pins connecting each
Daughter board to the Acquisition board.
The 136-channel logic analyzer modules have two Daughter boards; the
102-channel logic analyzer modules have only one Daughter board. No Daughter
boards are present in 68-channel or 34-channel logic analyzer modules; the probe
input circuitry for these modules is present on the Acquisition board.
Each P6417 probe acquires 17 channels (16 data channels and one clock or
qualifier) of data.
Daughter Boards
Probes