Tektronix LTA7P Series, Руководство по обслуживанию

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Specifications
1- 4
TLA7Nx, TLA7Px, & TLA7Qx Logic Analyzer Module Service Manual
Table 1- 2: LA module clocking (Cont.)
Characteristic Description
Clocking state machine
Pipeline delays Each channel group can be programmed with a pipeline delay of 0 through 3 active
clock edges.
1
It is possible to use storage control and only store data when it has changed (transitional storage).
2
Applies to asynchronous clocking only. Setup and hold window specification applies to synchronous clocking only.
3
Any or all of the clock channels may be enabled. For an enabled clock channel, either the rising, falling, or both edges
can be selected as the active clock edges. The clock channels are stored.
4
Full and half speed modes are controlled by PowerFlex options and upgrade kits.
Table 1- 3: LA module trigger system
Characteristic Description
Triggering resources
Word/Range recognizers 16 word recognizers. The word recognizers can be combined to form full width, double
bounded, range recognizers. The following selections are available:
16 word recognizers 0 range recognizers
13 word recognizers 1 range recognizer
10 word recognizers 2 range recognizers
7 word recognizers 3 range recognizers
4 word recognizers 4 range recognizers
Range recognizer channel order From most-significant probe group to least-significant probe group: C3 C2 C1 C0 E3
E2 E1 E0 A3 A2 D3 D2 A1 A0 D1 D0 Q3 Q2 Q1 Q0 CK3 CK2 CK1 CK0
Missing channels for modules with fewer than 136 channels are omitted. When
merged, the range recognition extends across all the modules; the master module
contains the most-significant groups.
The master module is to the left (lower-numbered slot) of a merged pair.
The master module is in the center when three modules are merged. Slave module 1
is located to the right of the master module, and slave module 2 is located to the left
of the master module.
Glitch detector
1,2
Each channel group can be enabled to detect a glitch
Minimum detectable glitch pulse width
(Typical) 2.0 ns (single channel with P6417 or a P6418 probe)
Setup and hold violation detector
1,3
Each channel group can be enabled to detect a setup and hold violation. The range is
from 8 ns before the clock edge to 8 ns after the clock edge. The range can be
selected in 0.5 ns increments.
The setup and hold violation of each window can be individually programmed.
Transition detector
1, 4
Each channel group can be enabled or disabled to detect a transition between the
current valid data sample and the previous valid data sample.