15
Chapter 1: Introduction
System Block Diagram
The block diagram below shows the connections and relationships between the subsystems
and major components of the overall system.
SATA
eSPI
USB3.0/2.0
PCH
Lewisburg-R
PE[5]
AST2500A2
SPI
CPU4
SKT P5
(4189 pins)
CPX6
UPI0
UPI1
UPI4
UPI5
PE1
UPI X20
UPI0
UPI1
UPI4
UPI5
DMI
PE3
PE3
UPI4
UPI5
UPI0
UPI1
USB2.0[8]
RTL8211F
DMI
P2_DIMMB1
P2_DIMMB2
P2_DIMMA1
P2_DIMMA2
P2_DIMMC1
P2_DIMMC2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
P2_DIMMD1
P2_DIMMD2
P2_DIMME1
P2_DIMME2
P2_DIMMF1
P2_DIMMF2
P3_DIMMB1
P3_DIMMB2
P3_DIMMA1
P3_DIMMA2
P3_DIMMC1
P3_DIMMC2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
P3_DIMMD1
P3_DIMMD2
P3_DIMME1
P3_DIMME2
P3_DIMMF1
P3_DIMMF2
PE3
PE1
SSATA x6
CPU3
SKT P5
(4189 pins)
CPX6
CPU1
SKT P5
(4189 pins)
CPX6
CPU2
SKT P5
(4189 pins)
CPX6
UPI2
UPI3
UPI2
UPI3
UPI2
UPI3
UPI3
UPI2
UPI5
UPI4
UPI0
UPI1
BMC
UPI X20
0
2
X
I
P
U
0
2
X
I
P
U
UPI X20
SYS.SPI
CPLD
JVGA1
JCOM1
COM CONN
VGA CONN
FW.SPI
SATA x8
SSATA
PE2
BIOS
BMC FW
PE3
PE1
PE2
PE2
PE1
PE3
SLOT2
CPU1 PE3 x8[8:15]
RUIO-Riser
CPU1 PE3 x8[0:7]
CPU1 PE2 x16
CPU2 PE2 x8[0:7]
CPU2 PE3 x16
P4_DIMMB1
P4_DIMMB2
P4_DIMMA1
P4_DIMMA2
P4_DIMMC1
P4_DIMMC2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
P4_DIMMD1
P4_DIMMD2
P4_DIMME1
P4_DIMME2
P4_DIMMF1
P4_DIMMF2
P1_DIMMB1
P1_DIMMB2
P1_DIMMA1
P1_DIMMA2
P1_DIMMC1
P1_DIMMC2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
DDR4 DIMM X2
P1_DIMMD1
P1_DIMMD2
P1_DIMME1
P1_DIMME2
P1_DIMMF1
P1_DIMMF2
SATA0
SSATA0
JS1
JS2
JS3
SATA1
SATA2
SATA3
SATA4
SATA5
SATA6
SATA7
SSATA1
SSATA2
SSATA3
CPU2 PE1 x16
CPU1 PE1 x16
SLOT1
LUIO-Riser
2
E
P
2
E
P
CPU2 PE2 x8[8:15]
X710-TM4
M.2 K-M#1
M.2 K-M#2
SSATA x2
SSATA x2
JMD1
JMD2
SSATA x4
3
J
1
J
J45
J44
FP2
VGA HEADER
MUX
NAND FLASH
CPLD FLASH
TPM Header
JTPM1
NC-SI
Dedicated LAN
[3]
[1,2]
J46
SLOT3
PCIe X8[8:15]
PCIe X8[0:7]
AIOM
J50
J51
J52
J53
Ethernet
NC-SI
2
1
REAR
Dedicated LAN
[1,2]
JUSBRJ45
TY
PE
-A
JUSB1
USB3.0
USB2.0
[3]
USB3.0
USB2.0
inside
USB2.0[6,7]
USB2.0[6,7]
10G SFP+ #0
10G SFP+ #1
10G RJ45 #0
10G RJ45 #1
LAN1
LAN2
LAN3
LAN4
DDR4
U18
U17
U9
U13
CPU4 PE2 x16
CPU4 PE1 x16
CPU4 PE3 x16
CPU3 PE3 x16
CPU3 PE1 x16
CPU3 PE2 x16
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19
J20
J21
J7
J43
Figure 1-5. System Block Diagram