Omron SYSMAC CQM1H Series, Руководство по программированию

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Shift Instructions Section 5-17
Description SFTR(84) is used to create a single- or multiple-word shift register that can
shift data to either the right or the left. To create a single-word register, desig-
nate the same word for St and E. The control word provides the shift direction,
the status to be put into the register, the shift pulse, and the reset input. The
control word is allocated as follows:
The data in the shift register will be shifted one bit in the direction indicated by
bit 12, shifting one bit out to CY and the status of bit 13 into the other end
whenever SFTR(84) is executed with an ON execution condition as long as
the reset bit is OFF and as long as bit 14 is ON. If SFTR(84) is executed with
an OFF execution condition or if SFTR(84) is executed with bit 14 OFF, the
shift register will remain unchanged. If SFTR(84) is executed with an ON exe-
cution condition and the reset bit (bit 15) is OFF, the entire shift register and
CY will be set to zero.
Flags ER: St and E are not in the same data area or ST is greater than E.
Indirectly addressed EM/DM word is non-existent.
(Content of
*
EM/
*
DM word is not BCD, or the EM/DM area boundary
has been exceeded.)
CY: Receives the status of bit 00 of St or bit 15 of E, depending on the
shift direction.
Example In the following example, IR 00000, IR 00001, IR 00002, and IR 00003 are
used to control the bits of C used in @SFTR(84). The shift register is in DM
0010, and it is controlled through IR 00004.
15 14 13 12 Not used.
Shift direction
1 (ON):
Left (LSB to MSB)
0 (OFF): Right (MSB to LSB)
Status to input into register
Shift pulse bit
Reset
00000 LD 00000
00001 OUT 03512
00002 LD 00001
00003 OUT 03513
00004 LD 00002
00005 OUT 03514
00006 LD 00003
00007 OUT 03515
00008 LD 00004
00009 @SFT(10)
035
DM 0010
DM 0010
Address Instruction Operands
00000
00001
00002
00003
00004
03512
03513
03514
03515
Direction
Status to input
Shift pulse
Reset
@SFTR(84)
035
DM 0010
DM 0010