45850101TH Rev.1
3-28
Oki Data CONFIDENTIAL
3. MAINTENANCE MENUS
Display Items of REG ADJUST RESULT
Upper display Lower display
Details
Memory
SNS
CARIBRAT(L)
DAC=***
Vmax=***
DAC: Luminescence current value [HEX]
Vmax: Sensor voltage at DAC [HEX]
SRAM
SNS
CARIBRAT(R)
DAC=***
Vmax=***
DAC: Luminescence current value [HEX]
Vmax: Sensor voltage at DAC [HEX]
SRAM
D-RANGE(L)
Y,M,C
***H,***H,***H
Result of left dynamic range measurement [HEX]
Y, M, C, in order of the left.
SRAM
D-RANGE(R)
Y,M,C
***H,***H,***H
Result of right dynamic range measurement [HEX]
Y, M, C, in order of the left.
SRAM
CRSE ADJ Y
L,R,X
***, ***, ***
Yellow LED coarse adjustment value
[DEC:1/1200”]
SRAM
CRSE ADJ M
L,R,X
***, ***, ***
Magenta LED coarse adjustment value
[DEC:1/1200”]
SRAM
CRSE ADJ C
L,R,X
***, ***, ***
Cyan LED coarse adjustment value [DEC:1/1200”] SRAM
FINE ADJ Y L,R,X ***, ***, ***
Yellow LED fine adjustment value [DEC:1/1200”]
SRAM
FINE ADJ M L,R,X ***, ***, ***
Magenta LED fine adjustment value
[DEC:1/1200”]
SRAM
FINE ADJ C L,R,X ***, ***, ***
Cyan LED fine adjustment value [DEC:1/1200”]
SRAM
REG ADJ Y L,R,X ***, ***, ***
Yellow LED adjustment value [DEC:1/1200”]
EEPROM
REG ADJ M L,R,X ***, ***, ***
Magenta LED adjustment value [DEC:1/1200”]
EEPROM
REG ADJ C L,R,X ***, ***, ***
Cyan LED adjustment value [DEC:1/1200”]
EEPROM
CRSE ADJ Y [Y-L] ***, ***, ***
Yellow LED coarse adjustment pattern detection
value at the sub-scanning left position
SRAM
CRSE ADJ Y [Y-R] ***, ***, ***
Yellow LED coarse adjustment pattern detection
value at the sub-scanning right position
SRAM
CRSE ADJ Y [X]
***, ***, ***
Yellow LED coarse adjustment pattern detection
value at the main scanning position
SRAM
CRSE ADJ M [Y-L] ***, ***, ***
Magenta LED coarse adjustment pattern
detection value at the sub-scanning left position
SRAM
CRSE ADJ M
[Y-R]
***, ***, ***
Magenta LED coarse adjustment pattern
detection value at the sub-scanning right position
SRAM
CRSE ADJ M [X]
***, ***, ***
Magenta LED coarse adjustment pattern
detection value at the main scanning position
SRAM
CRSE ADJ C [Y-L] ***, ***, ***
Cyan LED coarse adjustment pattern detection
value at the sub-scanning left position
SRAM
CRSE ADJ C [Y-R] ***, ***, ***
Cyan LED coarse adjustment pattern detection value
at the sub-scanning right position
SRAM
Upper display Lower display
Details
Memory
CRSE ADJ C [X]
***, ***, ***
Cyan LED coarse adjustment pattern detection value
at the main scanning position
SRAM
FINE ADJ Y [Y-L]
***, ***, ***,
Yellow LED fine adjustment pattern detection value
at the sub-scanning left position
SRAM
FINE ADJ Y [Y-L]
***, ***
FINE ADJ Y [Y-R] ***, ***, ***,
Yellow LED fine adjustment pattern detection value
at the sub-scanning right position
SRAM
FINE ADJ Y [Y-R] ***, ***
FINE ADJ Y [X-L]
***, ***
Yellow LED fine adjustment pattern detection value
at the main scanning left position
SRAM
FINE ADJ Y [X-R] ***, ***
Yellow LED fine adjustment pattern detection value
at the main scanning right position
SRAM
FINE ADJ M [Y-L] ***, ***, ***,
Magenta LED fine adjustment pattern detection
value at the sub-scanning left position
SRAM
FINE ADJ M [Y-L] ***, ***
FINE ADJ M [Y-R] ***, ***, ***,
Magenta LED fine adjustment pattern detection
value at the sub-scanning right position
SRAM
FINE ADJ M [Y-R] ***, ***
FINE ADJ M [X-L] ***, ***
Magenta LED fine adjustment pattern detection
value at the main scanning left position
SRAM
FINE ADJ M [X-R] ***, ***
Magenta LED fine adjustment pattern detection
value at the main scanning right position
SRAM
FINE ADJ C [Y-L]
***, ***, ***,
Cyan LED fine adjustment pattern detection value at
the sub-scanning left position
SRAM
FINE ADJ C [Y-L]
***, ***
FINE ADJ C [Y-R] ***, ***, ***,
Cyan LED fine adjustment pattern detection value at
the sub-scanning right position
SRAM
FINE ADJ C [Y-R] ***, ***
FINE ADJ C [X-L] ***, ***
Cyan LED fine adjustment pattern detection value at
the main scanning left position
SRAM
FINE ADJ C [X-R] ***, ***
Cyan LED fine adjustment pattern detection value at
the main scanning right position
SRAM
• Results will be stored as described in memory filed.
• The contents in SRAM are deleted when the test starts, and values detected at the normal
competition or until the machine stops due to errors are written.
• The contents in EEPROM are updated only at the normal competition of the test.