Q-Code User Manual
Ver. 7.0 2021/11/30
178
2. This command is applicable to the SPI Flash of N25Q series; the instruction is 0x04.
3. After this command is executed, WEL bit (bit1) of status register will be cleared to 0, and
writing data to SPI Flash is invalid at this time. User can confirm the bit status through
SPI_RDSR command.
Ex.
SPI_WRDIS
; Transmit Write Disable command through SPI1.
SPI_WRDIS(SPI1)
; Transmit Write Disable command through SPI1.
SPI_WRDIS(SPI2)
; Transmit Write Disable command through SPI2.
4.9.7 SPI_RDID(Result, SPIGroup)
Transmit Read Identification to SPI Flash and read the information about Manufacturer ID, Memory
Type and Capacity of SPI Flash.
Result:
Save the variable of the read-back information, which can be a combination of Ri or Xi and
requires 24-bit; the high 8-bit is Manufacturer ID, the middle 8-bit is Memory Type and the low
8-bit is Capacity.
SPIGroup:
Select the corresponding SPI channel.
NY6 does not support SPIGroup parameter.
NY7 supports SPI1 or SPI2; default is SPI1 if omitted.
Note:
1. NY4 / NY5 / NY5+ / NY6A / NY9T / NX1 do not support this command.
2. This command is applicable to the SPI Flash of N25Q series; the instruction is 0x9F.
Ex.
SPI_RDID(R5:R4:R3:R2:R1:R0)
; Read SPI Flash Information via SPI1, and save Manufacturer ID in [R5: R4], Memory Type in
[R3: R2], Capacity in [R1: R0].
SPI_RDID(X2:X1:X0, SPI2)
; Read SPI Flash Information via SPI2, and save Manufacturer ID in X2, Memory Type in X1,
Capacity in X0.
4.9.8 SPI_CE
Transmit Chip Erase command to SPI Flash and excute erasing all memory.
The system will not enter sleep mode when the erase action is executing. After the erasing is
completed, the “SPI_EraseEnd” path will be automatically executed. User can read the WIP bit (bit0)
status of the status register by using the SPI_RDSR command. When the erase is in progress, the
WIP bit is 1; when the erase is completed, the WIP bit is 0.
SPIGroup:
Select the corresponding SPI channel.
NY6 does not support SPIGroup parameter.
