NuMicro® NUC029LEE/NUC029SEE
32-bit Arm
®
Cortex
®
-M0 Microcontroller
Aug, 2018
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294
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497
Rev 1.00
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UC02
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UC029
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ICA
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PWM3 Synchronous Busy Status Register (SYNCBUSY3)
Register
Offset
R/W
Description
Reset Value
SYNCBUSY3
0x94
R
PWM3 Synchronous Busy Status Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
S_BUSY
Bits
Description
[31:1]
Reserved
Reserved.
[0]
S_BUSY
PWM Synchronous Busy
When Software writes CNR3/CMR3/PPR or switch PWM3 operation mode
(PCR[27]), PWM will have a busy time to update these values completely because
PWM clock may be different from system clock domain. Software need to check this
busy status before writing CNR3/CMR3/PPR or switching PWM3 operation mode
(PCR[27]) to make sure previous setting has been updated completely.
This bit will be set when Software writes CNR3/CMR3/PPR or switch PWM3
operation mode (PCR[27]) and will be cleared by hardware automatically when PWM
update these value completely.