OEM617D Technical Specifications
Appendix C
OEM6 Family Installation and Operation User Manual Rev 12
142
C.1.2
Logic-Level I/O
The OEM617D provides a number of Logic-level I/O pins for status indication and timing. These I/O include:
•
COM1, COM2 and COM3: LVTTL level UART ports (no flow control) (3.3 V I/O)
•
CAN1 and CAN2: CMOS level CAN ports (require external CAN transceivers) (2.7 V I/O, 3.3V
compatible levels)
•
TIMEMARK: Output pulse providing time reference signal (software configurable output rate) (3.3 V
I/O)
•
VARF: Variable Frequency output (a software configurable clock output) (3.3 V I/O)
•
PV: Position Valid (Goes high when the receiver has calculated a valid position) (3.3 V I/O)
•
EVENT1 and EVENT2: Event inputs (configurable polarity) (2.7 V I/O, 3.3 V compatible levels)
These I/O require additional ESD protection if they are routed to connectors. The same ESD protection circuit
shown below should be used on any OEM617D Logic-level signal that attaches to an enclosure connector.
The ferrite bead and small value capacitor provide some immunity to electrostatic discharge events, but also
reduce radiated and conducted emissions from the enclosure.
EVENT, PPS and PV Signal Protection
Use the following circuit to create adequate protection for the EVENTx and PPS outputs in most situations.
Figure 70: OEM617D ESD Protection for EVENT and PPS Strobes Schematic
Use the PV signal to drive an LED with the buffer circuit below. This circuit indicates that the receiver card
has computed a valid position:
