CHAPTER 9 TARGET SYSTEM INTERFACE CIRCUITS
User’s Manual U15260EJ3V1UM
104
9.5
FLMD0, FLMD1
Figure 9-5. FLMD0 and FLMD1 Pins
74LV125
74LV125
V
DD2
V
DD
Signal
33
Ω
PG-FP4
Target system
9.6
V
DD
, V
DD2
When V
DD
and V
DD2
are supplied from the target system, the PG-FP4 internal voltage regulator is protected.
Figure 9-6. V
DD
and V
DD2
Pins
Target system
V
DD
or V
DD2
PG-FP4
1 k
Ω
0.1 F
2 k
Ω
1 k
Ω
0.01 F
V
DD
/V
DD2
generator
Polyswitch
350 mA
Transistor
A/D input
µ
µ
Содержание PG-FP4
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