INVERTEC V300-I
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E-6
THEORY OF OPERATION
ond. The negative portion is the other FET
group1. The dwell time (off time) is 48
microseconds (both FET groups off). Since
only 2 microseconds of the 50-microsecond
time period is devoted to conducting, the
output power is minimized.
MAXIMUM OUTPUT
By holding the gate signals on for 24
microseconds each and allowing only 2
microseconds of dwell time (off time) during
the 50-microsecond cycle, the output is
maximized. The darkened area under the
top curve can be compared to the area
under the bottom curve. The more dark
area under the curve, the more power is
present.
The term PULSE WIDTH MODULATION is
used to describe how much time is devoted
to conduction in the positive and negative
portions of the cycle. Changing the pulse
width is known as MODULATION. Pulse
Width Modulation (PWM) is the varying of
the pulse width over the allowed range of a
cycle to affect the output of the machine.
MINIMUM OUTPUT
By controlling the duration of the gate sig-
nal, the FET is turned on and off for differ-
ent durations during a cycle. The top draw-
ing above shows the minimum output signal
possible over a 50-microsecond time peri-
od.
The positive portion of the signal represents
one FET group1 conducting for 1 microsec-
FIGURE E.6 — TYPICAL FET OUTPUTS.
MINIMUM OUTPUT
MAXIMUM OUTPUT
24
50
24
2
48
50
sec
sec
sec
sec
sec
sec
sec
sec
PULSE WIDTH MODULATION
1 A FET group consists of the sets of FET modules
grouped onto one switch board.
