Lake Shore 648, Руководство пользователя

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Operational error status register
REF PFF Name CAL TH EPE MFF HLV LLV
MFF
MFF
5
5
Error Status
Enable Register
ERSTE, ERSTE?
6 7
REF PFF
REF PFF
ERSTR?
AND
AND
Error Status
ERST?
Event Register
7 6
OR
AND
AND
EPE
2 3 4
LLV HLV TH
Bit 0 1
CAL Name
AND
AND
AND
CAL TH EPE LLV HLV Name
AND
4 2 3 1 0 Bit
5
Condition Register
Error Status
7 6 4 2 3 0 1 Bit
Status Byte Register
(see Figure 5-1.)
To Bit 1 (OESB) of
5.2.7 Status System Detail: Status Byte Register and Service Request (SRQ) 51
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5.2.7 Status System
Detail: Status Byte
Register and Service
Request (SRQ) As shown in Figure 5-1, the Status Byte Register receives the summary bits from the
two status register sets and the message available summary bit from the output buf-
fer. The status byte is used to generate a service request (SRQ). The selection of sum-
mary bits that will generate an SRQ is controlled by the Service Request Enable
Register.
5.2.7.1 Status Byte Register
The summary messages from the event registers and output buffer set or clear the
summary bits of the Status Byte Register (FIGURE 5-4). These summary bits are not
latched. Clearing an event register will clear the corresponding summary bit in the
Status Byte Register. Reading all messages in the output buffer, including any pending
queries, will clear the message available bit. The bits of the Status Byte Register are
described as follows:
D
Operation Summary (OSB), Bit (7): set summary bit indicates that an enabled
operation event has occurred.
D
Request Service (RQS)/Master Summary Status (MSS), Bit (6): this bit is set when a
summary bit and the summary bits corresponding enable bit in the Service
Request Enable Register are set. Once set, the user may read and clear the bit in
two different ways, which is why it is referred to as both the RQS and the MSS bit.
When this bit goes from low to high, the Service Request hardware line on the bus
is set, this is the RQS function of the bit. See section 5.2.4.5. In addition, the status
of the bit may be read with the *STB? query which returns the binary weighted
sum of all bits in the Status Byte, this is the MSS function of the bit.


Performing a serial poll will automatically clear the RQS function but not the MSS
function. An *STB? will read the status of the MSS bit (along with all of the sum-
mary bits), but also will not clear it. To clear the MSS bit, either clear the event
register that set the summary bit or disable the summary bit in the Service
Request Enable Register.
D
Event Summary (ESB), Bit (5): set summary bit indicates that an enabled standard
event has occurred.
FIGURE 5-6