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10.6.5
Diagnostics
The feedback wiring on the JPDG is different from the other PDM core boards. Using the JA1 connector, the JPDG hosts the
PPDA I/O pack. The P1 connector is not there on JPDG. The P2 connector provides feedback signals from other core PDM
boards. The following signals are created by the JPDG:
•
An electronic ID identifying the board type, revision, and serial number
•
Control voltage (28 V dc) measurement reading with accuracy specified at ±1% of full scale
•
Fuse feedback status for FU1-FU8 in 28 V dc power distribution section
•
Two dc power converter output status (dry contact status) signals for two (28 V dc) power supplies in control power
distribution section
•
Two testpoints with series 10 kΩ resistors are provided on the 28 V dc bus for external test equipment. TP1 is connected
to the positive bus and TP2 is connected to the negative bus. They are used by external test equipment to measure the 28
V power voltage.
•
Two analog 24/48 V dc voltage feedbacks are provided. One is for positive bus and one is for negative bus, with the dc
bus centered on earth as part of the ground fault detection scheme. Voltage feedback accuracy is ±1%.
•
Fuse feedback status for FU10-FU23 in 24/48 V dc power distribution section
•
Two dc power converter output (dry contact) status signals for two 24/48 V dc power supplies in wetting power
distribution section
•
Two testpoints with series 10 kΩ resistors are provided on the 24/48 V dc bus for external test equipment. TP3 is
connected to the positive bus and TP4 is connected to the negative bus.
•
Two ac supply measurement readings with accuracy specified at ±4% of full scale.
Note
Due to a large signal count present on the JDPG, a single set of board feedback signals is not adequate to transmit the
signals to a PPDA I/O pack. Each JPDG consumes three sets of feedback signals out of the six available sets.
Note
FU1 to 8 and DryCnt1 and 2 are on the 28 V dc input. FU10 to 21 are on the 24 V dc input. Fuse and dry contacts
failure diagnostics will not be generated if
InputDiagEnab
on the respective dc input is set to Disable or the dc input is below
the low limit threshold. The low limit threshold on 28 V is pre-fixed at 5 V. The low limit threshold on 24 V is pre-fixed at 10
V.
Also, dry contact diagnostics will not be generated if the user selects
NoDryCnt
on the input on which a dry contact exists.
10.6.6
Configuration
When jumper JP1 is in place, the JPDG provides 12 kΩ voltage-centering resistors from positive and negative dc to the local
earth connection. When JP1 is removed, the connection to earth is opened. Insert JP1 when a floating dc bus needs to be
centered on earth.
PDM Power Distribution Modules
GEH-6855_Vol_II System Guide 383
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Содержание Mark VIeS
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Страница 153: ...TRLYS1D Circuits TMR YDOA Discrete Output Modules GEH 6855_Vol_II System Guide 153 Public Information ...
Страница 157: ...TRLYS1F Terminal Board Wiring YDOA Discrete Output Modules GEH 6855_Vol_II System Guide 157 Public Information ...
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