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4
-
12
Analog Board Circuit Explanation
ECG Measuring Circuit
Waveform input part
For 4, 5, 10-electrode:
ECG input signal from the lead cable takes differential to the left leg in the input amplifier and is
amplified. The amplified differential signal is converted into A/D by the A/D converter. The data
converted into A/D is inputted in gate array, converted into transmission data to FPGA, and
transmitted. The transmitted data is isolated in photo coupler and inputted in FPGA. CPU obtains
data from FPGA through local bus. FPGA outputs control data to gate array.
Hardware does not have lead change, time constant circuit, wide-area blocking filter, or AC Filter,
but 12-Lead waveform is generated by combining differential signal of each electrode in
software.Software also processes Patient Classification and each filter.
For 3-electrode:
ECG input signal is received in buffer amplifier and combined in the lead set from CPU by a
multiplexer. The signal is amplified in the differential amplifier and converted into A/D by the A/D
converter. The data converted into A/D is inputted to the gate array. Subsequent process is the
same as 4, 5, 10-electrode.
Lead OFF Detection
Processing each electrode with pulldown resistor and reading ECG A/D value for Lead OFF, the
detached electrode is detected. Since all ECG signals take differential to the left leg, the A/D
converter converts to detect the detached electrode only for the left leg aside from ECG.
Pacemaker Detection
Pulse Amplitude
±
2 to
±
700mV
Pulse Width
0.1 to 2ms
ECG input signal is received in buffer amplifier and combined in the lead set from CPU by a
multiplexer. Pulse is outputted by amplifying, detecting a certain level or more of signal with a
Window Comparator, and triggering monostable multivibrator. This output pulse is isolated and
transferred to CPU by photo coupler.
The hardware detects Pacemaker pulse only while the software performs the pulse removal
(pseudo pacemaker pulse generation and mask process of waveform).
Detection of Lead Cable
Reference voltage is generated toward the ECG relay cable and resistance mounted in the ECG
relay cable and the voltage divided by the reference resistance on the board are received by the
buffer amplifier. Received electric potential is converted by the A/D converter. The data converted
into A/D is inputted in gate array, converted into transmission data to FPGA, and transmitted. The
software calculates and detects the type of ECG relay cable using the A/D value.
Countermeasure for Anti Defibrillator
Since solid resistor is used in the ECG connector to protect against Anti Defibrillator,
countermeasure elements are not mounted inside the equipment.
Содержание HS-8000 Series
Страница 4: ...Blank Page ...
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Страница 21: ...General Description Chapter 1 General Description 1 2 Features 1 3 1 1 ...
Страница 24: ...1 4 Blank Page ...
Страница 25: ...Specification Chapter 2 Specification Performance 2 2 Specification 2 2 Performance 2 4 2 1 ...
Страница 34: ...3 4 Blank Page ...
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Страница 66: ...HS 8312M Accembly1 HS 8312M 01A 6 2 ...
Страница 67: ...HS 8312M Assembly2 HS 8312M 02A 6 3 ...
Страница 68: ...HS 8312M Assembly3 HS 8312M 03A 6 4 ...
Страница 69: ...HS 8312M Assembly4 HS 8312M 04A 6 5 ...
Страница 70: ...HS 8312N Assembly1 HS 8312N 01A 6 6 ...
Страница 71: ...HS 8312N Assembly2 HS 8312N 02A 6 7 ...
Страница 72: ...6 8 NIBPS 801 Assembly NIBP 801 01A ...
Страница 96: ...8 18 Blank Page ...
Страница 132: ...39 4 Hongo 3 chome Bunkyo ku Tokyo Japan Phone 81 3 3815 2121 Fax 81 3 3814 1222 Printed in Japan 4R0100640 201108 ...