5.5 Power-on and COMRESET
5.5 Power-on and COMRESET
Figure 5.20 shows the power-on sequence, and Figure 5.21 shows the
COMRESET sequence.
Immediately after power-on or COMRESET, the host sets 0x7Fh in the Status
field of the Shadow Block Register and 0xFFh in other fields. After the power-on
sequence shown below and after communication with the SATA interface is
established, the host sets 0xFFh in the Status field of the Shadow Block Register.
The device completes the power-on sequence within 10 ms so that communication
with the SATA interface can be established.
Device
TX (Host
RX)
Host TX
(Device
RX)
Host
power
on
Host
ComReset
Host
releases
ComReset
Host
calibrate
Host
ComWake
Host
releases
ComWake
Host
Align
Host
data
Device
ComInit
Device
releases
ComInit
Device
Calibrate
Device
ComWake
Device
Align
Device
data
Host
power
off
Device
power
on
Device
power
off
Figure 5.20 Power-on sequence
C141-E280
5-187
Содержание MHZ2080BJ
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