Freescale Semiconductor MCF52230 ColdFire, Справочное руководство

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UART Modules
26-2 Freescale Semiconductor
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
NOTE
The DTIN n pin can clock UART n . However, if the timers are operating and
the UART uses DTIN n as a clock source, input capture mode is not available
for that timer.
The serial communication channel provides a full-duplex asynchronous/synchronous receiver and
transmitter deriving an operating frequency from the internal bus clock or an external clock using the timer
pin. The transmitter converts parallel data from the CPU to a serial bit stream, inserting appropriate start,
stop, and parity bits. It outputs the resulting stream on the transmitter serial data output (UTXD
n ). See
Section 26.4.2.1, “Transmitter .”
The receiver converts serial data from the receiver serial data input (URXD n ) to parallel format, checks
for a start, stop, and parity bits, or break conditions, and transfers the assembled character onto the bus
during read operations. The receiver may be polled, interrupt driven, or use DMA requests for servicing.
See
Section 26.4.2.2, “Receiver .”
NOTE
The GPIO module must be configured to enable the peripheral function of
the appropriate pins (refer to
Chapter 14, “General Purpose I/O Module” )
prior to configuring the UART module.
26.1.2 Features
The device contains three independent UART modules with:
• Each clocked by external clock or internal bus clock (eliminates need for an external UART clock)
• Full-duplex asynchronous/synchronous receiver/transmitter
• Quadruple-buffered receiver
• Double-buffered transmitter
• Independently programmable receiver and transmitter clock sources
• Programmable data format:
— 5–8 data bits plus parity
— Odd, even, no parity, or force parity
— One, one-and-a-half, or two stop bits
• Each serial channel programmable to normal (full-duplex), automatic echo, local loopback, or
remote loopback mode
• Automatic wake-up mode for multidrop applications
• Four maskable interrupt conditions
• All three UARTs have DMA request capability
• Parity, framing, and overrun error detection
• False-start bit detection
• Line-break detection and generation
• Detection of breaks originating in the middle of a character
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60