Freescale Semiconductor MC9S12ZVHL32, Справочное руководство

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Chapter 6 S12Z Debug (S12ZDBGV2) Module
S12ZVHY/S12ZVHL Family Reference Manual Rev. 1.05
202 Freescale Semiconductor
6.3.2.19 Debug Comparator C Address Register (DBGCAH, DBGCAM, DBGCAL)
Read: Anytime.
Write: If DBG not armed and PTACT is clear.
1 1 1 Read match
Address: 0x0135, DBGCAH
23 22 21 20 19 18 17 16
R
DBGCA[23:16]
W
Reset 0 0 0 0 0 0 0 0
Address: 0x0136, DBGCAM
15 14 13 12 11 10 9 8
R
DBGCA[15:8]
W
Reset 0 0 0 0 0 0 0 0
Address: 0x0137, DBGCAL
7 6 5 4 3 2 1 0
R
DBGCA[7:0]
W
Reset 0 0 0 0 0 0 0 0
Figure 6-21. Debug Comparator C Address Register
Table 6-35. DBGCAH, DBGCAM, DBGCAL Field Descriptions
Field Description
23–16
DBGCA
[23:16]
Comparator Address Bits [23:16] — These comparator address bits control whether the comparator compares
the address bus bits [23:16] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
15–0
DBGCA
[15:0]
Comparator Address Bits [15:0]— These comparator address bits control whether the comparator compares
the address bus bits [15:0] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
Table 6-34. Read or Write Comparison Logic Table
RWE Bit RW Bit RW Signal Comment