Force SYS68K/CPU-30 R4, Техническое справочное руководство

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Hardware Description SYS68K/CPU-30 R4 Technical Reference Manual
Page 102
3.19 The VMEbus Interrupt Handler
All seven VMEbus interrupt request (IRQ) signals are connected to the
interrupt handling logic on the FGA-002 Gate Array. Each of the
VMEbus IRQ signals can be separately enabled or disabled. The
FGA-002 Gate Array allows high-end multiprocessor environment board
usage with distributed interrupt handling.
The FGA-002 Gate Array acts as a D08(O) interrupt handler in
accordance with the VMEbus specification. It does not support 16-bit
interrupt vectors.
In addition, every VMEbus interrupt request level can be mapped to
cause an interrupt to the processor on a different level. So, for example, a
VMEbus interrupt request on level 2 (IRQ2*) can be mapped to cause an
interrupt request to the processor on level 5.
The complete VMEbus interrupt management is done inside the
FGA-002.
3.19.1 VMEbus
IACK Daisy
Chain Driver
In accordance with the VMEbus specification, the CPU board includes an
IACK daisy-chain driver. In the case of the CPU-board located in slot-1,
the board acts as an IACK daisy-chain driver. Located in any other slots,
the board closes the IACKIN-IACKOUT path according to the VMEbus
specification.
NOTE: On the backplane the jumper for IACKIN-IACKOUT-Bypass
must be removed for proper operation. This is not necessary on active
backplanes.
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