Force SYS68K/CPU-30 R4, Техническое справочное руководство

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Hardware Description SYS68K/CPU-30 R4 Technical Reference Manual
Page 94
3.15 The CPU Board Interrupt Structure
The FGA-002 Gate Array on the CPU board monitors all local and
VMEbus interrupts. Each interrupt request from the local bus (SCSI and
floppy disk controllers DUSCCs, RTC, PI/T timers, etc) as well as the
FGA-002 specific interrupt requests are combined with seven VMEbus
interrupt requests.
Each and every interrupt source, including the VMEbus IRQs, can be
programmed to interrupt the CPU on an individually programmable
priority level, from 1 through 7.
The Gate Array may supply the interrupt vector, or it may initiate an
interrupt vector fetch from the I/O device or from the VMEbus.
In addition to local interrupts, the ACFAIL* and SYSFAIL* signals from
the VMEbus can be programmed to interrupt the CPU on a software
programmable level.
Interrupt vectors supplied by the FGA-002 all share a basic vector and a
fixed vector offset for each source. The basic vector is software
programmable.
The table below shows the connection between local devices and the
local interrupt request of the FGA-002.
Device Function(s) IRQ
RTC Various
0
FDC Various 1
PI/T #1 Port and Timer Interrupt Requests (IRQs) 2
PI/T #2 Timer IRQ 3
DUSCC #1 Various 4
DUSCC #2 Various 5
LANCE Various 6
SCSI Various 7