Force SYS68K/CPU-30 R4, Техническое справочное руководство

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SYS68K/CPU-30 R4 Technical Reference Manual Hardware Description
Page 101
3.18 VMEbus Slave Interface
3.18.1 The Access
Address
The on-board shared RAM of the CPU board is also accessible from the
VMEbus by another VMEbus master. Both the beginning and ending
address of the Shared RAM are programmable in 4-Kbyte increments
inside the FGA-002.
3.18.2 Data Transfer
Size of the
Shared RAM
The VMEbus slave interface for the Shared RAM is 32 bits wide. It
supports 32-bit, 16-bit, and 8-bit as well as unaligned (UAT) and read-
modify-write (RMW) transfers.
3.18.3 Address
Modifier
Decoding
For slave access to the Shared RAM from the VMEbus only Extended
Address (A32) accesses are allowed.
The on-board logic allows accesses in the Privileged (supervisor) or Non-
Privileged (user) mode for both data and program accesses. Each access
mode can be enabled or disabled separately within the FGA-002. Thus,
for example, read and write permission can be enabled for supervisor
accesses, and read permission only for user accesses.
The following table shows the allowed AM Codes for VMEbus accesses
to the Shared RAM.
Table 36: VMEbus Slave AM Codes
AM Code
Address Modifier
Function
5 4 3 2 1 0
0E
0D
0A
09
L
L
L
L L
L
L
L H
H
H
H H
H
L
L
H
L
H
L
L
H
L
H
Extended Supervisory Program Access
Extended Supervisory Data Access
Extended Nonprivileged Program Access
Extended Nonprivileged Data Access