Epson S1C6S3N2, Техническое руководство

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S1C6S3N2 TECHNICAL HARDWARE
EPSON
I-11
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
Initial reset can be executed externally by setting the reset
terminal to the high level. This high level must be main-
tained for at least 5 msec (when oscillating frequency is
f
OSC1
= 32 kHz, after oscillation circuit start up), because
the initial reset circuit contains a noise rejector circuit.
When the reset terminal goes low the CPU begins to operate.
Another way of executing initial reset externally is to input a
high signal simultaneously to the input ports (K00–K03)
selected with the mask option. The specified input port
terminals must be kept high for at least 5 msec (when
oscillating frequency is f
OSC1
= 32 kHz, after oscillation
circuit start up), because the initial reset circuit contains a
noise rejector circuit. Table 2.2.1 shows the combinations of
input ports (K00–K03) that can be selected with the mask
option.
Reset pin (RESET)
Simultaneous high
input to input ports
(K00–K03)
Table 2.2.1
Input port combinations
A Not used
B K00 * K01
C K00 * K01 * K02
D K00
*
K01
*
K02
*
K03
When, for instance, mask option D (K00
*
K01
*
K02
*
K03) is
selected, initial reset is executed when the signals input to
the four ports K00–K03 are all high at the same time.
Further, when the input time of the simultaneous HIGH
input is tested and found to be the same or more than the
defined time (1–3 sec), the time test circuit that performs
initial reset can be selected with the mask option.
If you use this function, make sure that the specified ports
do not go high at the same time during ordinary operation.
If the CPU runs away for some reason, the watchdog timer
will detect this situation and output an initial reset signal.
See "4.2 Resetting Watchdog Timer" for details.
Watchdog timer
(Auxiliary reset)