![background image](http://html.mh-extra.com/html/epson/s1c33l26/s1c33l26_technical-manual_107790237.webp)
18 UNIVERSAL SERIAL INTERFACE (USI)
S1C33L26 TECHNICAL MANUAL
Seiko Epson Corporation
18-13
Writing 1 to IMTG sets IMBSY to 1. When data in the transmit data buffer is sent to the transmit shift reg-
ister, IMBSY reverts to 0 and IMSTA[2:0] is set to 0x2 (end of transmit data). An interrupt request can be
generated at this point. Write subsequent data to the transmit data buffer to start the following transmission
using this interrupt.
However, as in the case of the slave address transmission, check that the slave device has sent back an ACK
(by setting IMTGMOD[2:0] to 0x6 and IMTG to 1) before starting the following 8-bit data transmission.
Repeat an 8-bit data transmission and ACK receiving check for the required number of times.
(4) Generating stop condition
To end I
2
C communication after all data has been sent, the I
2
C master must generate a stop condition. The
stop condition applies when the SCL line is maintained at high and the SDA line is pulled up from low to
high. To generate a stop condition in this I
2
C master, set IMTGMOD[2:0] to 0x1 and write 1 to IMTG.
Stop condition
SDA (USI_DI)
SCL (USI_CK)
5.3.6 Stop Condition
Figure 18.
IMBSY is set to 1 while a stop condition is being generated. When the stop condition is generated, IMBSY
is reset to 0 and IMSTA[2:0] is set to 0x1. Read IMBSY or use an interrupt to check that a stop condition
has been generated. The I
2
C bus subsequently switches to free state.
(5) Generating repeated start condition
To make it possible to continue with a different data transfer after a data transmission has completed, the
I
2
C master can omit stop condition generation and generate a repeated start condition. To generate a re-
peated start condition, perform a start condition generation procedure described in Step (1). Slave address
transmission is subsequently possible with the I
2
C bus remaining in the busy state.
SDA (USI_DI)
SCL (USI_CK)
Repeated start condition
5.3.7 Repeated Start Condition
Figure 18.
Data reception in I
2
C master mode
The following describes the data receiving procedure in I
2
C master mode.
START
END
Generate start condition
Generate stop condition
Send slave address and transfer
direction bit
ACK received?
yes
no
Finished?
yes
Receive data
Send ACK
Error handling
no
5.3.8 I
Figure 18.
2
C Master Data Receiving Flow Chart