Dini Group DN9002K10PCI, Руководство пользователя

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H A R D W A R E
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By convention, the host program should leave the Spartan in the FPGA deselected
state. To deselect the FPGA, write to BAR0, address 0x208 the data 0x10. (FPGA
SELECT NONE)
This interface can also be used for Readback. The configuration section does not implement the
SelectMap protocol, so the host application would be required to implement the necessary
SelectMap instructions. See the Virtex-5 Configuration Guide for the SelectMap interface
description.
To read configuration data from an FPGA, <not implemented at print time contact Dini Group
support>
7.2.5 Direct PCI to FPGA, DMA
Detail about the software required by the host of the DN9002K10PCI can be found in
D:\FPGA_Reference_Designs\DN9002K10PCI\PCI_interface\
QL5064_Interface_Module.pdf
This document should be used to design software to access the user design in FPGA A. DMA
in particular requires accessing the QL5064 registers (in BAR0) to setup each transaction.
Using the device driver provided use the dma_scatter_gather_read() and
dma_scatter_gather_write() functions.
Performance has been characterized using the DN9002K10PCI reference design on Windows
XP on a MSI MS6728 motherboard using the AETest application. The speeds are:
Read (DN9002K10PCI to software): 700Mbs
Write (software to DN9002K10PCI): 350Mbs
7.2.6 Direct PCI to FPGA A, Target access
If DMA is not required, accessing FPGA A from the host software is easy. Simply read or write
to an address in BAR 1,2,3,4 or 5.
7.2.7 Performance
Performance is dependent on a lot of things, including the quality of the motherboard/chipset,
and any delays in the FPGA logic. Also, using a 66Mhz or 64-bit PCI slot can improve
performance in some situations. The following figures are given for a “Typical” system: 2Ghz
processor with a 33MHz, 32bit PCI slot running 32-bit Windows XP. The FPGA in this typical
design responds to PCI requests quickly.
When using the driver function IOCTL_DNDEV_BAR_READ_BUFFER to do target read
accesses, each read transaction (32-bit) takes an average of 40 PCI clock cycles, with an
additional 150 PCI cycles of overhead for each driver call. This means that, depending on
whether reads are sequential (so each driver call can read multiple words), performance will
range from 0.88MB/s to 3.3MB/s
DN9002K10PCI User Guide www.dinigroup.com 86