![Dini Group DN9002K10PCI Скачать руководство пользователя страница 59](http://html1.mh-extra.com/html/dini-group/dn9002k10pci/dn9002k10pci_user-manual_2505740059.webp)
H A R D W A R E
•
Built-in FPGA configuration
Compact Flash, PCI, USB, JTAG
Configuration
Readback supported
•
One tri-mode Ethernet interface (FPGA B)
•
RS232, Logic Analyzer, LEDs.
Support
1.1.2
Description
The DN9002K10PCI is a complete logic emulation system that enables ASIC or IP designers a
vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions.
The DN9002K10PCI is hosted on a 32/64-bit, 33/66MHz PCI bus, or can be used stand-alone
and configured via USB. A single DN9002K10PCI configured with two Xilinx Virtex-5,
XC5VLX330s can emulate up to 4 million gates of logic as measured by LSI (or at least how
LSI used to measure ASIC gates when they manufactured ASICs). This number does not
include the embedded memories and multipliers resident in each FPGA, all of which are 100%
available to user application. The DN9002K10PCI achieves high gate density and allows for fast
target clock frequencies by utilizing FPGAs from Xilinx's Virtex-5 FPGA family for logic and
memory. All FPGA resources are available for the target application. Any subset of FPGAs can
be stuffed.
The DN9002K10PCI uses high I/O-count, 1760-pin, flip-chip BGA packages. Abundant fixed
interconnects (either differential or single-ended) are provided between the FPGAs. All pins of
all banks of each FPGA are utilized. FPGA to FPGA busses are routed and tested LVDS, run
at but can be used single-ended at a reduced speed. Example designs utilizing the
integrated ISERDES/OSERDES with DDR for pin multiplexing are included.
Two separate 400-pin FCI MEG-Array connectors allow for customization with daughter cards.
Signals to/from these cards are routed differentially, and can run at the limit of the FPGA:
400MHz. Clocks, resets, and presence detection, along with abundant power are included in
each connector.
One DDR2 SODIMM sockets are stuffed and have connections to both FPGAs. Each socket
is tested to 250MHz with a DDR2 SODIMM. Standard, off-the-shelf DDR2 memory Dims
(PC2-3200/PC2-4200) work nicely and we can provide these for a small charge. We have
developed alternative SODIMMs that can be stuffed into these positions. Consult the factory
for more details, but the list includes FLASH, SSRAM, QDR SSRAM, Mictor and others.
The configuration bit files for the FPGAs are copied onto a CompactFlash card (provided) and
an on-board Cypress microprocessor controls the FPGA configuration process. FPGA
configuration can also be controlled via the USB interface. Visibility into the configuration
process is enhanced with an RS232 port. Sanity checks are performed automatically on the
configuration bit files, streamlining the configuration process. FPGA configuration occurs at the
DN9002K10PCI User Guide
www.dinigroup.com
49
Содержание DN9002K10PCI
Страница 1: ...LOGIC Emulation Source UserGuide DN9002K10PCI ...
Страница 3: ......
Страница 34: ......
Страница 46: ...C O N T R O L L E R S O F T W A R E DN9002K10PCI User Guide www dinigroup com 36 ...
Страница 150: ......