3-14
AlphaServer DS20 Service Manual
Table 3-7 Pchip Error Register
Name
Bits
Type
Initial
State
Description
SYN
<63:56>
RO
0
ECC syndrome of error if CRE or
UECC.
PCI command when error occurred if not
CRE or UECC.
If CRE or UECC, then:
Value
Command
0000
DMA read
0001
DMA read-modify-write
0011
SGTE read
CMD
<55:52>
RO
0
Others
Reserved
INV
<51>
RO Rev1
RAZ Rv0
0
Info Not Valid – meaningful when one
of bits <11:0> is set. Indicates the
validity of SYN, CMD, and ADDR bits.
Valid = 0, Invalid = 1.
ADDR
<50:16>
RO
0
If CRE or UECC, then ADDR<50:19> =
system address <34:3> of erroneous
quadword and ADDR<18:16> = 0.
If not CRE and not UECC, then
ADDR<50:48> = 0;
ADDR<47:18> = starting PCI address
<31:2> of transaction when error was
detected;
ADDR<17:16> = 00
→
not a DAC
operation;
ADDR<17:16> = 01
→
via DAC SG
Window 3;
ADDR<17> = 1
→
via Monster Window
RES
<15:12>
MBZ, RAZ 0
Reserved
CRE
<11>
R, W1C
0
Correctable ECC error.
UECC
<10>
R, W1C
0
Uncorrectable ECC error.
RES
<9>
MBZ, RAZ 0
Reserved.
NDS
<8>
R, W1C
0
No b_devsel_l as PCI master.
Содержание AlphaServer DS20
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