10-35
IM 704610-01E
Communication Command
10
10.3 Status Report
Overview of Registers and Queues
Name (Function)
Write
Read
Status Byte
Serial Poll
(RQS), *STB?(MSS)
Service request
*SRE
*SRE?
enable register
(status byte mask)
Standard event
–
*ESR?
register (changes in device status)
Standard event
*ESE
*ESE?
enable register
(standard event register mask)
Extended event
–
STATus:EESR?
register (changes in device status)
Extended event
STATus:EESE
STATus:EESE?
enable register
(extended event register mask)
Condition register
–
STATus:CONDition?
(current device status)
Transition filter
STATus:FILTer<x>? STATus:FILTer<x>?
(conditions that change the extended event register)
Output queue
All query commands
(stores a response message to a query)
Error queue
–
STATus:ERRor?
(stores the error no. and message)
Registers and Queues Affecting the
Status Byte
The following is a consolidation of registers affecting
individual bits of the status byte.
• Status event register: sets bit 5 (ESB) of the status byte to 1/0.
• Output queue: sets bit 4 (MAV) of the status byte to 1/0.
• Extended event register: sets bit 3 (ESS) of the status byte to 1/
0.
• Error queue: sets bit 2 (EAV) of the status byte to 1/0.
Enable Registers
The following is a consolidation of registers that can
mask each bit and effectively disable them even if the
bits are set to 1.
• Status byte: masks each bit per the service request enable
register
• Standard event register: masks each bit per the standard event
enable register
• Extended event register: masks each bit per the extended event
enable register
Reading from and Writing to Registers
The *ESE command is used to set each bit of the
standard event register to 1 or 0. The *ESE?
command can be used to confirm whether each bit of
the standard event register is set to 1 or 0. This is
explained in detail for each command in section 10.2.
10.3.2
Status Byte
Status Byte
7
6
ESB MAV EES EAV
1
0
RQS
MSS
Bits 0, 1, and 7
Unused (always 0)
Bit 2
EAV (Error Available)
Set to 1 when the error queue is not empty. In other
words, set to 1 when an error occurs. See page 10-38.
Bit 3
EES (Extend Event Summary Bit)
Set to “1” when the logical product of the extended
event register and the corresponding event register is
“1.” In other words, set to 1 when an instrument-
internal event occurs. See page 10-37.
Bit 4
MAV (Message Available)
Set to 1 when the output queue is not empty. In other
words, set to 1 when data exists that must be output in
response to a query. See page 10-38.
Bit 5
ESB (Event Summary Bit)
Set to “1” when the logical product of the standard
event register and the corresponding event register is
“1.” In other words, set to 1 when an instrument-
internal event occurs. See page 10-36.
Bit 6
RQS (Request Service)/MSS (Master Status
Summary)
Set to 1 when the logical product of bits other than bit 6
of the status byte and the service request enable
register is not 0. In other words, set to 1 when the
instrument makes a service request to the controller.
RQS is set to 1 when MSS changes from 0 to 1, and is
cleared during a serial poll or when MSS changes to 0.
Bit Masking
To mask bits of the status register so that they are not
a factor of SRQ, the corresponding bits of the service
request enable register are set to 0. For example, to
request a service even when bit 2 (EAV) is masked
and an error occurs, set bit 2 of the service request
enable register to 0. This is done using the *SRE
command. Also, you can query whether each bit of the
service request enable register is 1 or 0 using the
*SRE? command. See section 10.2 for information on
the *SRE command.