Installation and Operation Guide SOLECTRIA® PVI 25TL-208, PVI 50TL-480 and PVI 60TL-480
DOCR-071030-A (10/7/2022)
Page 15 of 131
⑥
DC SPD (Surge Protective Device)
⑦
Internal ground terminal
⑧
AC output terminal block
⑨
Negative DC input busbar
⑩
Rapid Shutdown transmitter
Schematic Diagram and Circuit Design
The basic electrical schematic diagram of the PVI 50TL-480 and PVI 60TL-480 inverters with a standard wire box is
shown in Figure 2-3; the schematic diagram of the same inverters with the MLPE (rapid shutdown transmitter
integrated) wire box is show in Figure 2-4. The diagram for the PVI 25TL-208 is shown in Figure 2-5.
The input from PV source circuits passes through surge protection circuitry, DC EMI wave filters, and independent
DC-DC boost circuitry to achieve maximum-power-point tracking and boost the voltages to a common DC bus. The
inverter uses line voltage and frequency measurements to synchronize to the grid and converts the available PV
power to AC power by injecting balanced 3-phase AC current into the electric utility grid. Any high frequency AC
component is removed by passing through a two-stage relay and EMI wave filter to produce high quality AC power.
WIRE BOX
INVERTER POWER HEAD
L1
L2
L3
N
PV1+
PV1+
PV1+
PV1+
PV1+
PV1-
PV1-
PV1-
PV1-
PV1-
MPPT1
MPPT2
AC
Output
PV Input
PV2+
PV2+
PV2+
PV2+
PV2+
PV2-
PV2-
PV2-
PV2-
PV2-
AC
Switch
Fuses
MPPT3
PV3+
PV3+
PV3+
PV3+
PV3+
PV3-
PV3-
PV3-
PV3-
PV3-
DC SPD
PV1+
DC Switch
Three
level
inverter
AFD
PV2+
PV3+
PV-
PE
Type
Ⅲ
MOV
Figure 2-3 PVI 50/60TL-480 Inverter Schematic, Standard Wire Box
The Rapid Shutdown wire box has been designed specifically for NEC 2017+ Rapid Shutdown applications.
This
wire box includes a powerline communications transmitter, powered by AC at the inverter output. This
transmitter sends a “stay alive” signal to AP Smart, NEP and Tigo receivers at the array. When the inverter senses
