Xilinx HDMI 1.4, Product Manual

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HDMI 1.4/2.0 TX Subsystem 39
PG235 October 4, 2017 www.xilinx.com
Chapter 3: Designing with the Subsystem
As an illustration, when Max Bits Per Component is set to 12, Figure 3-4 shows the data
format for quad pixels per clock to be fully compliant with the AXI4-Stream video protocol.
A data format for a fully compliant AXI4-Stream video protocol with dual pixels per clock is
illustrated in Figure 3-5 .
Table 3 ‐ 1: Max Bits Per Component Support
Max Bits Per Component Actual Bits Per Component Bits Transported by Hardware
16
8 [7:0]
10 [9:0]
12 [11:0]
16 [15:0]
12
8 [7:0]
10 [9:0]
12 [11:0]
16 [15:4]
10
8 [7:0]
10 [9:0]
12 [11:2]
16 [15:6]
8
8 [7:0]
10 [9:2]
12 [11:4]
16 [15:8]
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