HDMI 1.4/2.0 TX Subsystem
10
PG235 October 4, 2017
Chapter
2:
Product Specification
and jitter. When HDMI TX subsystem is used in DVI mode, the ACR inputs are ignored. You
can decide to leave them open or connect them to some fix values (for example, connecting
acr_cts
,
acr_n
, and
acr_valid
to 0). See
for an example
ACR module that is part of the audio pattern generation system.
Display Data Channel (DDC)
The subsystem allows the end-user to build an HDMI source device, which negotiates with
the targeted HDMI sink device for supported features and capabilities. The communication
between the source device(s) and the sink device is implemented through the DDC lines,
which is an I2C bus included on the HDMI cable.
Status and Control Data Channel (SCDC)
The subsystem supports following two bits in SCDC register address offset 0x20 for TMDS
configurations (Table 10-19 of HDMI 2.0 spec).
• Bit 1 TMDS_BIt_Clock_Ratio
• Bit 0 Scrambling_Enable
Automatically handled by HDMI TX subsystem driver at Stream Start through the API.
• XV_HdmiTxSs_StreamStart
Two underlining subcore API drivers are called to set the above two SCDC bits with respect
to the video stream to sent.
• XV_HdmiTx_Scrambler(InstancePtr->HdmiTxPtr); is to used to:
°
Enable HDMI TX scrambler for HDMI 2.0 video and disable scrambler for HDMI 1.4
video stream.
°
Update scrambler bit in Sink's TMDS Configuration register
• V_HdmiTx_ClockRatio(InstancePtr->HdmiTxPtr); is to set TMDS Clock Ratio bit for HDMI
2.0 video.
An API is also available at HDMI TX Subcore driver to show the sink's SCDC register values.
(For debugging or advanced use cases)
void XV_HdmiTx_ShowSCDC(XV_HdmiTx *InstancePtr);
Hot Plug Detect
The subsystem supports the Hot Plug Detect (HPD) feature, which is a communication
mechanism between HDMI source and HDMI sink devices. For example, when an HDMI
cable is inserted between the HDMI source and sink devices, the HPD signal is asserted,
which triggers the subsystem to start communicating with the sink device.
